ZRNA – Software-defined analog circuits(zrna.org) |
ZRNA – Software-defined analog circuits(zrna.org) |
Is it going to inspire a wave of FPAA hobbyist devboardvs and activities (just like microcontroller and later FPGA)? If so, we are surely living in a great time of computing.
That may be the main selling point of ZRNA. It's easier to use their FPAA API than to cobble together FPGA/DSP stuff. May also be easier to change on the fly, for example to automate certain experiments.
It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them.
Your average FPGA on the other hand is able to synthesize multiple 8-bit micros and benefits from wide parallelization, I don't see similar benefits with this approach.
Analog constraints are much different than digital ones. If you're expecting to do anything on the 18MHz range you wouldn't be looking at this product.
But in practice I'd doubt you would be using it for anything > 100kHz, maybe 1MHz. Which is absolutely fine for most applications this is intended.
If you're really targeting anything analog > 1MHz you really should know what you're getting into, and you wouldn't be looking at a board like this.
I am not sure what this implies; would you be able to build an equivalent, digital circuit (with presumably a ADC and a DAC stage) with an average AVR then? Or what's the clock comparison for?
And on top of that, the API looks quite understandable, so it may be easier to use the ZRNA for a certain signal processing task than create a custom DSP Core in Verilog or dig through MCU documentation. Though you could probably make an API for generating verilog code for the Icestorm toolchain, which would not require deep knowledge of digital design.
Other questions are bandwidth and sampling constraints. It seems to have at least one ADC...
Motorola had an FPAA product back in the 90's, but it never gained market traction and was aimed primarily at education.
I wonder now that FPGA's have gotten so powerful and large if it isn't possible to just simulate specific analog parts and "wire" them together into "analog circuits" to rapidly prototype analog designs? This would be different from simulation on a computer because the simulated analog FPGA circuit could actually be used, evaluated and tweaked in the field. Then, when the design is mature one could realize it using actual analog components.
That being said, you underestimate the "Blinkenlight crowd". There are not only hobbyists, but also researchers, who do not have years of EE education and experience, but want/need to cobble together hardware and software to do their research. Preferably without going back to school for a couple of years.
I can totally see where the ZRNA might save you some time. It's often not at all that easy to vary signal processing parameters across or within experiments.
16 bits is roughly 100dB, and achieving more than that is usually a serious engineering challenge. I'd like to see crosstalk rejection numbers for this system.
There are people working in the other direction, trying to use analogue for implementing the calculations of neural nets, and they tend to target the equivalent of 8 bit depth.
Don't get me wrong, I think this is a pretty niche thing that doesn't have a lot of applications. DSP is great, and it's not going to get overthrown anytime soon. But if you were looking for things that make signal processing in the analog domain exciting to think about, I stand by high equivalent bit depth for the processing bandwidth and power consumed as a valid advantage.
You want to be looking at the -3dB range to know +/- the actual useful bandwidth
> would the frequency of a MCU clock being higher than the bandwidth of an op amp ever be important
Unless you specifically want to capture the analog waveform of the clock signal of that processor, it is unimportant