Quite possibly I misunderstand on what level you mean that, but I think the devil is in the details, and "drag and drop your computer architecture" seems as unrealistic in practice as "drag and drop your application" turned out to be.

Unless you mean "architectural components" at such a high level that you don't mean to define (say) a CPU architecture, but basically just adding "device" soft cores to a common bus (or multiple) and configure their parameters, and where they are mapped in the address space and so on. In which case, that pretty much exists already today!

Quirks aside, you can totally drag, say, soft cores for a CPU, a few 16550A serial ports, video output devices, ethernet controllers, USB controllers--whatever you can think of essentially--into a Vivado block design, attach them to an AXI bus (whose structure you can also define graphically with many bus components to chose from), configure the memory map (or accept the defaults), and have "a computer".

Depending on the nature of your computer it might not even be much work to then get it to boot into Linux through U-Boot, with a device tree generated by the toolkit.

But I can imagine a simpler, "dumbed down" (in a useful way) more dedicated piece of software where this could be possible without knowing much of anything about FPGAs, yeah.

I used such a program, I think from Altair, in 2000 to design and simulate an 8-bit CPU not all dissimilar from the one in the article as part of an undergrad computer architecture course. It was all drag & drop from a logic gate level. You could build your own components out of gates (or include others). IIRC, we had a module for registers supplied to us, for example.

It was pretty slick. It included a simulator as well. I imagine it probably used verilog or vhdl under the hood (but I wouldn't learn Verilog proper until 3 years after). I think there was functionality to work with an FPGA, but we didn't use it for the class.

It was definitely the sort of project that really got me excited in college and I knew for sure I was on the right track with what I wanted to study.

That's sort of (if you squint a great deal) what you get with Chisel and RISC-V Rocket Chip. It's not drag and drop but you can customize the design to a certain extent just by editing some parameters in a file. It only applies to the cores and close components like the cache and off-chip links. There isn't a good integrated range of open source peripherals.

Old presentation about this: https://riscv.org/wp-content/uploads/2015/01/riscv-rocket-ch... especially slide 6

This would be wonderful - I hacked on a CPU architecture and brought it to an FPGA by manually converting a Logisim [1] schematic to VHDL. It's still terribly buggy.

Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close.

[1] http://www.cburch.com/logisim/

It's not a GUI, but Clash's ideals (aka Haskell's) are exactly what you're looking for. Small, composable components.

that sounds like Quartus Block Design, I used it to program a simple 'dynamic ROM' onto a CPLD once: https://youtu.be/rw7xYkM1-HY?t=219

I build “74 series logic” computers as a hobby. It’s a lot of fun!

It’s not difficult to buy old 74x181 and 74x182 ICs on eBay. You can even get sixteen-bit ALUs like the IDT 7831 for decent prices.

Build a register file from a bank of registers. For example, use a 74x138 and a few 74x377.

Alternatively, either use a true dual port SRAM to build a three port register file, or build your own from a time-multiplexed SRAM and some bus transceivers.

Complex combinational logic can be implemented in an EEPROM truth table pretty easily.

Sometimes, part of the fun is figuring out how to build a complex device from a very limited palette of parts.

It has been done previously[1] so it is definitely doable. Especially when there's some nice room for improvement, as the linked cpu runs at 500kHz.

There's also an additional project[2], but it seems stalled with no progress during the past few years.

1. https://github.com/pineapple-one/about

2. https://hackaday.com/2018/02/09/a-risc-v-that-the-rest-of-us...

You might enjoy this. https://hackaday.com/2021/12/03/homebrew-16-bit-computer-rei...

Ben Eater had a whole video on why he encourages building a breadboard computer.

https://www.youtube.com/watch?v=fCbAafKLqC8

A lot of people have taken what they've learned and moved on to designing their own PCB versions. You can see some of them here: https://www.reddit.com/r/beneater

While the color coating of the wires can be useful, I preferred enameled copper wire/magnet winding wire of 0.3mm gauge, when I did such stuff. Maybe 0.2mm, NOT 0.1mm!(too soft) At 0.3mm they are tightly bendable, stay in place after bending them, and can touch each other. This enables building of esthetically pleasing structures, instead of the pictured mess. Imagine something like the pipes screensaver from the WinNT 4 days, but shining in copper. Also usable to wire together LED-cubes or similar structures.

Reminds me of the old MIT 6.004 nerd kits. (Roughly a suitcase-sized briefcase with breadboards and TTL components to build a CPU with.)

Aside from the RISC instruction set part, all the specs scream standard 8-bit "microcomputer" of the late 70s and early 80s.

Maybe not, if the CPU is built out of discrete components:

https://en.wikipedia.org/wiki/Microcomputer

> A microcomputer is a small, relatively inexpensive computer with a microprocessor as its central processing unit (CPU).[2]