Windows XP 2002 for the Itanium: Unbridled rage(virtuallyfun.com) |
Windows XP 2002 for the Itanium: Unbridled rage(virtuallyfun.com) |
Itanium never made it into the consumer-class hardware that was XP’s audience. AFAIK, Intel never even published a roadmap for that to happen!
Maybe a proof of concept they shipped as a demonstration of loyalty to Intel?!
Intel never made Itanium CPUs cheap enough to realistically purchase and Itanium motherboards never became a thing from the top-10 sized Taiwanese motherboard makers (the same companies that were making really nice boards for the 1 GHz to 1.2 GHz socketed Pentium 3 with 512KB cache and the first generations of Pentium 4).
Also the performance sucked. This was before AMD64 existed on the corporate desktop or home desktop.
EDIT: there was also an additional patch released in May 2020 according to https://en.wikipedia.org/wiki/Windows_Server_2008_R2#Itanium
Ironically, it died around the time LLMs/AI started becoming good. I feel like the compiler problems with vliw could be solved to a degree with a purpose built ai
The fundamental issue is that there simply doesn't exist enough information to be able to extract the necessary parallelism without a rewrite, its the same issue as trying to autovectorise. You can do it to some degree, but it doesn't work in practice to be able to fill out a very wide architecture with reasonable efficacy
The SIMT programming model has proven to be much more successful vs trying to autovectorise or mash things into a VLIW architecture
I just think the arch has a similarity to archs like cell where it was planned for a world without the end of dennard scaling and just stopped making sense when we weren't targeting scaling to 10Ghz consumer CPUs and beyond.
The relatively fixed clock period that makes sense post ~2006 also means that the CPU architecture of that made the most sense ~2006 (Tomasulo OoO cores) continues to make sense, with most of the process gains going to just making bigger, wider cores.
The rise of the web—and databases behind it—as the dominant high-end, high-margin workload obsoleted that assumption.
There’s a great presentation floating around where a Compaq-acquired-DEC engineer is trying to justify how great the OpenVMS port from Alpha to Itanium is going, despite benchmarks showing Alpha smoking Itanium running Apache.
> I said, wait I am sorry to derail this meeting. But how would you use a simulator if you don't have a compiler? He said, well that's true we don't have a compiler yet, so I hand assembled my simulations. I asked "How did you do thousands of line of code that way?" He said “No, I did 30 lines of code”. Flabbergasted, I said, "You're predicting the entire future of this architecture on 30 lines of hand generated code?" [chuckle], I said it just like that, I did not mean to be insulting but I was just thunderstruck. Andy Grove piped up and said "we are not here right now to reconsider the future of this effort, so let’s move on".
https://www.sigmicro.org/media/oralhistories/colwell.pdf
> Davidson also pointed out two areas where academic research could create a blind spot for architecture developers. First, most contemporary academic research ignored CISC architectures, in part due to the appeal of RISC as an architecture that could be taught in a semester-long course. Since graduate students feed the research pipeline, their initial areas of learning frequently define the future research agenda, which remained focused on RISC. Second, VLIW research tended to be driven by instruction traces generated from scientific or numerical applications. These traces are different in two key ways from the average system-wide non-scientific trace: the numerical traces often have more consistent sequential memory access patterns, and the numerical traces often reflect a greater degree of instruction-level parallelism (ILP). Assuming these traces were typical could lead architecture designers to optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue VLIW was driven by the prejudices of a few researchers, rather than by sound technical analysis.
http://courses.cs.washington.edu/courses/csep590/06au/projec...
What?
I think maybe you are confusing Itanium with something else?
Development on itanium stopped in 2013:
> On 31 January 2013 Intel issued an update to their plans for Kittson: it would have the same LGA1248 socket and 32 nm process as Poulson, thus effectively halting any further development of Itanium processors.[1]
It's true that it shipped until 2021, but I think you had to already have previous orders to get that.
That still seems weird to me. If I had to rely on a PC for high-end work in that period, I wanted the server SKU.
Going by my faulty memory, I'd say it wasn't until Tukwila that it was a clear win over Alpha EV7z. By the time Tukwila arrived, it was pretty clear that Itanium's goose was already cooked.