I understand that they used Claude to create some sort of produced a verification code and test environments from circuit-design information, verification programs, and protocol specifications. But isn't precisely this quite risky due to the statitical nature of LLMs? I would have thought that they rather operate with very rigid test suites based on such software like F*, Coq, and whatnot.

Can someone with understanding of the process chime in here?

Here is the text snippet from the original korean article. Indeed the information was misrepresented:

"Customer-specific SoC verification work, which Usually takes Over a month, was completed in just two days. A second-year employee completed a USB model development that previously takes a month in a single day".

> Claude built a virtual test environment with placeholder blocks standing in for the missing RTL and started catching errors before the real design was even finished. Reportedly, this task would normally take over a month, but Claude managed to finish it in two days.

Seems a lot went quite right, traditional 30 day task done in 2 days