Nvidia Brings Kepler to Mobile Devices(blogs.nvidia.com) |
Nvidia Brings Kepler to Mobile Devices(blogs.nvidia.com) |
So I'm a little skeptical, too - but maybe not so much on the performance side (as they say, it's hugely scalable, and has OpenGL API support that is simply unmatchable by the competition over the next few years), but about power consumption.
They say it's very efficient and uses very little power, but lately Nvidia's focus has been too much on performance, and too little on power consumption. Here's a tip for you Nvidia: If your chip can't be put in a phone, don't call it a "mobile" chip.
I think that's how all mobile chip makers should think. Because at least then, they can make a very efficient chip that helps a phone last for 2 days, and for tablets they just scale up from that and overclock it or add more cores. But if they do it the other way around, they'll get greedy and want to put too much performance in it, and force OEM's to use bigger and bigger batteries (which adds to the cost, and so on). Or it forces the chip makers to fork the chip line, into a lower-end more efficient one, and a higher-end more performance oriented one, like it happened to both Nvidia and ARM.
Another tip for Nvidia: When in doubt, use the smaller process node. They failed to do that with Tegra 3, when everyone else moved early to 28/32nm, and they paid a huge price for it in the market, in both lost branding and lost customers. So next time, choose the smaller process node, even if it's more expensive. It will be worth it, because both OEM's and customers will be asking for it. So what I'm saying is Tegra 5 needs to be 20nm next year, not 28nm.
I think this is a case of semantic collision. For quite a long time "mobile graphics" meant "laptop graphics."
I would imagine that for mobile, the "insert favorite gpu metric here" per watt would be more important than the aggregate metric.
On the power front, smaller process means less energy needed to switch transistors. To illustrate the point, I was working with some 22nm NAND flash at my last job. In order to better understand the the characteristics of the chip's raw bit errors (errors before error correction is applied) we had a lengthy conversation with one of Micron's engineers. It turns out that in a 22nm NAND chip, the difference between a set and an unset bit is approximately the charge equivalent of 8 electrons.
The way I'm envisioning it, the processor would detect when the device is docked in a full power desktop or notebook configuration. At that point it would switch to a higher power profile for PC gaming and work station class as computing tasks.