> According to this article, the latest Haswell microarchitecture can do up to 8 operations per cycle and has a reorder buffer size of 192 micro-ops. Former architectures, like Sandy/Ivy Bridge, are capable of up to 6 operations per cycle and have a buffer size of 168 micro-ops. At least from that perspective, Apple's Cyclone is positioned in between the two Intel microarchitectures.

So Apple's chip architecture is between Sandy Bridge and Haswell. That's not to say that A7 is as fast as SNB chips, because it has roughly half the clock speed of those chips, but it seems to follow my previous prediction that either this year or next year we'll see a mobile ARM chip that will be as fast as a SNB "Core" chip (at the time I was predicting it will be Nvidia's Denver, but I think Apple's A8 will achieve that, too, this year).

Then after one more generation (late 2015), we should see mobile ARM CPU's rival Haswell/Broadwell in performance, considering how little the IPC has improved for these Intel CPUs since Sandy Bridge (my previous comment on this here: https://news.ycombinator.com/item?id=7661573), while ARM CPUs will continue to have pretty significant gains in performance every year, over the next few years (certainly at least until they reach the FinFET 16nm node).

It would be interesting to compare against a baseline like ARMv8-optimized AES-GCM.