yes, since Nehalem it was not publicly disclosed. Only the BIOS writer guide had these details. The Model Specific Register address and its bit value settings were not published, not all BIOS implementations exposed the 4 h/w prefetchers. In some CPUs they stayed disabled that way which made debugging more difficult.
Unless you plan to run with these disabled, how would disabling them during benchmarking possibly improve the relevance of the benchmarks? And if the benchmarks aren't relevant, why benchmark?